The Register space in any ASIC is very important part for design as it provides the only means to configure and monitor the status of various processes that happen inside the ASIC The numbers of such register has been increase in step with the increase in the complexity of the ASICs to the tune that you could have millions of registers in some ASICs.. There are individual set of register & containers (array of same register). Each register have their own type (write-read, read-only), Reset values, fields etc these registers are replicated in ASIC no of times with unique address depending upon module instantiates.
Functioning of an ASIC highly depends on this registers. They are the nuts and bolts communication with firmware. Ensuring that the register work exactly as intended is one most important and challenging tasks in ASIC Verification.
In order to verify this registers efficiently one of the techniques employed is to create accurate Register Database in spirit format. Spirit Register Database is commonly used in industry because of the ease it extends to parse and convert to any language code for verification. We are using this to parse into system verilog language (OVM/UVM Register package) for our ASIC verification and same package is used to generate different language code bases (C++, Verilog, Etc).
Challenges for Register Verification:
- The Register space in any ASIC is very important block.
- ASIC’s contain lot of registers.
- Different type of Register (Status, Control Etc) & Array of registers.
- Replication of same set of Register space.
- All the aspects of Registers RTL Implementation should be verified properly.
- Functional coverage of all the fields of each register can be used as one of the parameter for verification closer.
OVM/UVM Register package help us to overcome all above mentioned challenges and have a below mentioned benefits.
- Use this Register package (Register Database SV class) as Reference Model, Stimulus generator or scoreboard in Verification environment.
- Single point modification will reflects in whole verification environment.
- Verify all aspects of registers(type, reset, fields, reserve area).
- Verifies Register using backdoor operations.
- Get the functional coverage of all registers and their fields.
- Use full to generate other language code for same register database.
